Check Execution State Of Automatic Algorithm; Table 25-3 Bit Allocation Of Hardware Sequence Flags; Table 25-4 List Of Functions Of Hardware Sequence Flags - Fujitsu MB90420/5 (A) Series Hardware Manual

25.6 Check the Execution State of Automatic Algorithm
Since the Programming/erasing flow is controlled by the automatic algorithm, 1-Mbit flash memory has a
hardware sequence flag and Ready/Busy signal to inform units outside flash memory of its internal operation
and operation completion. The automatic algorithm enables the following hardware sequence flags to check
the flash memory operating state.
n Hardware sequence flags
A hardware sequence flag consists of 4-bit outputs of DQ7, DQ6, DQ5, and DQ3, each of which has a data
polling flag (DQ7), toggle bit flag (DQ6), timing limit exceeding flag (DQ5), and sector erase timer flag (DQ3).
These flags can be used to check whether programming, chip sector erasing, and sector erase code writing
are enabled.
The hardware sequence flags can be referenced by setting command sequences (Table 25-2 of 25.5) and
performing read access to the address of a target sector in flash memory. Table-25-3 gives the bit allocation
of the hardware sequence flags.
Bit No.
Hardware sequence flag
Whether programming and chip sector erasing are being executed can be checked using any of the
hardware sequence flags, or the RDY bit of the flash memory control register (FMCS). After the completion
of programming and erasing, the flash memory returns to the read/reset state.
At actual program creation, whether or not programming and erasing have been completed should be
checked using any of the hardware sequence flags, before performing the next processing such as data
reading. The hardware sequence flags can also be used to check whether the second and later sector erase
code writing is enabled. Table 25-4 lists the functions of the hardware sequence flags.
State
State change Programming
in normal
(when write address specified)
operation
Chip sector erasing → Completed
Sector erasing wait → Started
Erasing → Sector erasing
suspended
(Sector being erased)
Sector erasing suspended →
Resumed
(Sector being erased)
Sector erasing being suspended
(Sector not being erased)
Abnormal Programming
operation
Chip sector erasing
1-MBIT FLASH MEMORY

Table 25-3 Bit Allocation of Hardware Sequence Flags

7 6
DQ7 DQ6

Table 25-4 List of Functions of Hardware Sequence Flags

Completed
5 4 3
DQ5 — DQ3
DQ7
——
DQ7 → DATA:7 Toggle → DATA:6
0 → 1 Toggle → Stop
0 Toggle
0 → 1 Toggle → 1
1 → 0 1 → Toggle
DATA:7 DATA:6
——
DQ7 Toggle
0 Toggle
25-11
2 1
— —
DQ6 DQ5
0 → DATA:5
0 → 1
0
0
0
DATA:5
1
1
0
—
DQ3
0 → DATA:3
1
0 → 1
1 → 0
0 → 1
DATA:3
0
1