Fujitsu F2MC-16LX Hardware Manual page 536

APPENDIX
MOV R0, A
Before execution
After execution
❍ Direct branch addressing (addr16)
Specify an offset explicitly for the branch destination address. The size of the offset is 16 bits,
which indicates the branch destination in the logical address space. Direct branch addressing is
used for an unconditional branch, subroutine call, or software interrupt instruction. Bits 23 to 16
of the address are specified by the program bank register (PCB).
JMP 3B20H
Before execution
After execution
❍ Physical direct branch addressing (addr24)
Specify an offset explicitly for the branch destination address. The size of the offset is 24 bits.
Physical direct branch addressing is used for unconditional branch, subroutine call, or software
interrupt instruction.
JMPP 333B20H
Before execution
After execution
520
Figure B.3-2 Example of register direct addressing
(This instruction transfers the eight low-order bits of A to the general-purpose
register R0.)
A 0 7 1 6 2 5 3 4
A 0 7 1 6 2 5 6 4
Figure B.3-3 Example of direct branch addressing (addr16)
(This instruction causes an unconditional branch by direct branch addressing
in a bank.)
PC 3 C 2 0
PC 3 B 2 0
Figure B.3-4 Example of direct branch addressing (addr24)
(This instruction causes an unconditional branch by direct branch 24-bit
addressing.)
PC 3 C 2 0
PC 3 B 2 0
Memory space
R0
Memory space
R0
PCB 4 F
Memory space
4F3C22H
4F3C21H
4F3C20H
PCB 4 F
4F3B20H
PCB 4 F
Memory space
4F3C23H
4F3C22H
4F3C21H
4F3C20H
PCB 3 3
333B20H Next instruction
? ?
3 4
3 B
2 0
6 2 JMP 3B20H
Next instruction
3 3
3 B
2 0
6 3 JMPP 333B20H