Fujitsu F2MC-16LX Hardware Manual page 423

I UART clock selection
❍ Dedicated Baud Rate Generator
- Asynchronous baud rate = Φ / (prescaler division ratio) / (asynchronous transfer clock
division ratio)
- Synchronous baud rate = Φ / (prescaler division ratio) / (synchronous transfer clock division
ratio)
Φ: Machine clock
• The division ratios provided by the prescaler (common for asynchronous/synchronous
operation) are listed in Table 21.3-1 "List of UART registers".
Table 21.3-1 List of UART registers
MD
0
1
1
1
1
1
1
1
1
• For the division ratios of the synchronous transfer clock, see Table 21.3-2 "Division ratios of
the synchronous transfer clock".
Table 21.3-2 Division ratios of the synchronous transfer clock
CS2
0
0
0
0
1
1
Φ: Calculated based on the machine clock (internal frequency f=16 MHz) for DIV=1.
Note:
A clock division ratio of 1/1 (CS2-CS0=000
DIV3 to 0
-
0000
B
0001
B
0010
B
0011
B
0100
B
0101
B
0110
B
0111
B
CLK
CS1 CS0
synchronous
0 0
0 1 8M
1 0 4M
1 1 2M
0 0 1M
0 1 500K
DIV
Stop
1
2
3
4
5
6
7
8
Calculation formula
- (Φ / DIV)/1
(Φ / DIV)/2
(Φ / DIV)/4
(Φ / DIV)/8
(Φ / DIV)/16
(Φ / DIV)/32
) cannot be used during synchronous transfer.
B
CHAPTER 21 UART
SCK0
(Φ / DIV)/1
(Φ / DIV)/2
(Φ / DIV)/4
(Φ / DIV)/8
(Φ / DIV)/16
(Φ / DIV)/32
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