Fujitsu F2MC-16LX Hardware Manual page 544

APPENDIX
❍ Accumulator indirect addressing (@A)
Memory is accessed using the address indicated by the contents of the low-order bytes (16 bits)
of the accumulator (AL). Address bits 16 to 23 are specified by a mnemonic in the data bank
register (DTB).
528
Figure B.4-9 Example of register list (rlist)
POPW RW0, RW4
(This instruction transfers memory data indicated by the SP to multiple
word registers indicated by the register list.)
SP 3 4 F A
RW0
RW1
RW2
RW3
RW4
RW5
RW6
RW7
Memory space
0 4
0 3
0 2
SP 0 1
Before execution
Figure B.4-10 Example of accumulator indirect addressing (@A)
MOVW A, @A
(This instruction reads data by accumulator indirect addressing and stores it in A.)
Before execution
After execution
SP
RW0
RW1
RW2
RW3
RW4
RW5
RW6
RW7
Memory space
SP
34FEH
34FDH
34FCH
34FBH
34FAH
After execution
A 0 7 1 6 2 5 3 4
DTB B B
A 0 7 1 6 F F E E
DTB B B
3 4 F E
0 2 0 1
0 4 0 3
34FEH
0 4 34FDH
34FCH
0 3
0 2 34FBH
0 1 34FAH
Memory space
BB2535H F F
BB2534H E E