Fujitsu F2MC-16LX Hardware Manual page 438

CHAPTER 21 UART
❍ Sample code
ICR11
ICR12
DDR7
SMR
SCR
SIDR
SODR
SSR
REC
;---- Main Program ------------------------------------------------------------
CODE
SRAER:
;
LOOP:
;---- Interrupt Program -------------------------------------------------------
WARI:
;
;
;
CODE
;---- Vector Setting ----------------------------------------------------------
VECT
VECT
422
EQU 0000BBH
EQU 0000BDH
EQU 000017H
EQU 000020H
EQU 000021H
EQU 000022H
EQU 000022H
EQU 000023H
EQU SCR:2
CSEG ABS=0FFH
:
AND CXCR,#0BFH
MOV I:ICR13,#00H
MOV I:DDR7,#00000000B
MOV I:SMR,#00010001B
MOV I:SSR,#00010011B
MOV I:SSR,#00000010B
MOV I:SODR,#13H
MOV ILM,#07H
OR CCR,&40H
MOV A,#00H
MOV A,#01H
BRA LOOP
MOV A,SIDR
CLRB I:REC
:
User processing
:
RETI
ENDS
CSEG ABS=0FFH
ORG 0FF6C
DSL WARI
ORG 0FFDCH
DSL START
DB 00H
ENDS
; Control register for UART send interrupts
; Control register for UART reception interrupts
; Port-7 direction register
; Mode register
; Control register
; Input data register
; Output data register
; Status register
; Reception error flag clear bit
; Initialize stack pointer (SP) and other
; processing elements
; Disable interrupts
; Interrupt level 0 (Highest)
; Set SIN0 pin as input
; Operation mode 0 (asynchronous)
; Select use of dedicated baud rate
; generator (9615 bps)
; Disable clock output disable, enable data
; output
; No parity, 2-bit stop bit
; Data length of 8 bits, reception error
; flag clear
; Enable transmission/reception
; Disable send interrupts, enable reception
; interrupts
; Write send data
; Set ILM in the PS to Level 7
; Enable interrupts
; Infinite loop
; Read reception data
; Clear reception interrupt request flag
; Return from interrupt
; Vector set to Interrupt #36 (24H)
; Reset vector setting
; Single chip mode setting