Fujitsu F2MC-16LX Hardware Manual page 379

[Bit 13] INTE: interrupt enable
This bit is used to enable or disable interrupts at conversion end.
• 0: Interrupts prohibited
• 1: Interrupts allowed
Set this bit when using µDMA. An interrupt request will then trigger µDMA start.
This bit is initialized to "0" at reset.
Also read the caution remark in Section 19.4 "Conversion Data Protection Function".
[Bit 12] PAUS: A/D converter pause
This bit is set when A/D conversion pauses.
There is only one register for storing the results of A/D conversion. When conversion is
performed continuously, conversion results have to be transferred by µDMA, or data stored
previously will be overwritten. To prevent overwriting data, the next conversion result cannot
be stored before the contents of the data register has been transferred by µDMA, and A/D
conversion will be stopped in between. The A/D converter resumes conversion as soon as
data transfer by µDMA ends.
This register is effective only when µDMA is used.
Also read the caution remark in Section 19.4 "Conversion Data Protection Function".
This bit is initialized to "0" at reset.
[Bits 11 and 10] STS1, STS0: start source select
These bits are initialized to "00" at reset.
These bits select A/D start sources.
STS1 STS0
0 0 Software start
0 1 Start by an external pin trigger and by software
1 0 Start by timer and software
1 1 Start by an external pin trigger, timer, and software
In a mode for which two start sources apply, the first of the sources to occur will trigger start.
Start sources become effective from the time they are written. Exercise caution when
rewriting during A/D operation.
• When an external pin trigger is selected, a falling edge is detected.
• When the external trigger input level is "L", A/D conversion will start as soon as when this bit
is rewritten.
• The output of PPG1 is selected at the time the timer is selected.
Note:
When starting the A/D converter by an external trigger or an internal timer, set A/D startup
source bit STS1 or 0 of the ADCS2 register. Set the input value of the internal timer and the
external trigger only on the side that is in inactive state. If set on the active side, the A/D
converter might start to operate immediately.
For setting STS1 and STS0, set in the state of ADTG-1 input and internal timer (PPG1) = 0
output.
CHAPTER 19 8/10-BIT A/D CONVERTER
Function
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