Fujitsu F2MC-16LX Hardware Manual page 250
Mb90470 series 16-bit microcontroller
Hide thumbs
Also See for F2MC-16LX:
- Hardware manual (706 pages) ,
- Application note (13 pages) ,
- Operation manual (10 pages)
Table of Contents
Advertisement
CHAPTER 12 16-BIT INPUT/OUTPUT TIMER
I Control register (OCS0 to 5)
Control register (OCS0 to 5) has the bit configuration shown below.
Figure 12.2-12 Bit configuration of control register (OCS0 to 5)
000057
H
000059
H
00005B
H
000056
H
ICP1C ICP0 ICE1 ICE0
000058
H
00005A
(R/W) (R/W) (R/W) (R/W)
H
Control register (OCS0 to 5) consists of bits that have the functions explained below.
[Bits 15, 14, 13] Unused bits
These bits are not used. They are always set to "0".
[Bit 12] CMOD
This bit is for switching the pin output level reverse operation in compare matching if pin
output is permitted (OTE = 1 or OTE0 = 1).
•
If CMOD = 0 (initial value), the level corresponding to the compare register is reversed.
- OUT0/2/4: Level is reversed if a match for compare register 0/2/4 is found
- OUT1/3/5: Level is reversed if a match for compare register 1/3/5 is found
•
If CMOD = 1, compare register 0 reverses the output level where CMOD = 0, although the
pin (OUT1) output level corresponding to compare register 1 reverses the output level only
when both of compare register 0 and compare register 1 have a respective match. If
compare registers 0 and 1 have the same value, the operation is the same as that for one
compare register.
- OUT0/2/4: Level is reversed if a match for compare register 0/2/4 is found
- OUT1/3/5: Level is reversed if a match for compare register 1/3/5 is found
[Bits 11, 10] OTE1, OTE0
These bits permit pin output of output compare. This bit takes an initial value of "0".
0
1
•
OTE1: Corresponds with output compare 1/3/5
•
OTE0: Corresponds with output compare 0/2/4
[Bits 9, 8] OTD1, OTD0
These bits change the pin output level if pin output of output compare is permitted. The initial
value of compare pin output is set to "0". A write operation is performed after the compare
operation stops. In a read operation, the output value of the output compare pin is read.
0
1
234
15
14
13
12
-
-
-
CMOD OTE1 OTE0 OTD1 OTD0 Control register
(-)
(-)
(-)
(R/W) (R/W) (R/W) (R/W) (R/W) Initial value ---00000
7
6
5
4
General-purpose support (initial value)
Pin output of output compare
Compare pin output set to "0" (initial value)
Compare pin output set to "1"
11
10
9
8
3
2
1
0
-
-
CST1 CST0 Control register
(-)
(-)
(R/W) (R/W) Initial value 0000--00
OCS1/3/5
B
OCS0/2/4
B
Advertisement
Table of Contents
