Serial Input/Output Register (Sidr/Sodr) - Fujitsu F2MC-16LX Hardware Manual

21.2.3 Serial Input/Output Register (SIDR/SODR)

This section describes the configuration and functions of the serial input/output
register (SIDR/SODR).
I Serial input/output register (SIDR/SODR)
The bit configuration of the serial input/output register (SIDR/SODR) is illustrated below.
7
000022 D7
H
(R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) Reading/writing
(X)
The first bit (D7) of the serial input/output register (SIDR/SODR) will become invalid when the
stored data elements are 7 bits long. Always set the TDRE of the SSR register to "1" when
writing data elements to the SODR Register.
Note:
Write data elements at this address by the same method as that in writing data elements in
the SODR Register. This address is read by the same method as that used in reading
addresses of the SIDR Register.
6 5 4 3
D6 D5 D4 D3
(X) (X) (X) (X)
2 1 0 Serial input register (SIDR)/
D2 D1 D0 serial output register (SODR)
(X) (X) (X) Initial value
CHAPTER 21 UART
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