Fujitsu F2MC-16LX Hardware Manual page 425

❍ Internal timer
The applicable baud rate when CS2 to CS0 are set to "110" and the internal timer (PPG1) is
selected can be calculated by the following expressions:
Asynchronous (start-stop): (Φ Φ Φ Φ / N) /(16 x 2 x (n + 1))
CLK synchronous: (Φ Φ Φ Φ / N)/(2 x (n + 1))
N: Count clock source of the timer (PPG1)
n: Reload value of the timer (PPG1)
Table 21.3-4 "Relationship between baud rate and reload value (machine clock frequency:
7.3728 MHz)" shows the relationship between the baud rate and reload value when the machine
clock frequency is 7.3728 MHz.
Table 21.3-4 Relationship between baud rate and reload value
(machine clock frequency: 7.3728 MHz)
Clock asynchronous (Start-Stop)
Baud rate
(divide-by-2 of
machine clock)
38400
19200
9600
4800
2400
1200
600
300
Note 1: "-" indicates that a setting is prohibited
❍ External Clock
The baud rate when CS2 to CS0 are set to "111" can be calculated by the following
expressions:
Asynchronous (start-stop): f / 16
CLK synchronous: f'
f can be up to 1/2 of the machine clock at maximum. f' can be up to 1/8 of the machine clock
at maximum.
1
N = 2 N = 2
(divide-by-8 of
machine clock)
2 -
5 -
11 2
23 5
47 11
95 23
191 47
383 95
Reload value
Clock synchronous
3 1
N = 2
(divide-by-2 of
machine clock)
47
95
191
383
767
1535
3071
6143
CHAPTER 21 UART
3
N = 2
(divide-by-8 of
machine clock)
11
23
47
95
191
383
767
1535
409