Other Registers - Fujitsu F2MC-16LX Hardware Manual

8.2.3

Other registers

This section shows the configuration and explains the functions of registers other
than port registers (PDR0 to PDRA) or port direction registers (DDR0 to DDRA).
I Input resistor registers (RDR0, ROR1)
The bit configuration of input resistor registers (RDR0, ROR1) is shown in the figure below.
RDR0
Address:00001C
RDR1
Address:00001D
Input resistor registers (RDR0, ROR1) specify whether or not there is pull-up resistor in the input
mode.
• 0: Pull-up resistor in the input mode
• 1: No pull-up resistor in the input mode
These registers have no function in the output mode (no pull-up resistor).
The input or output mode is determined by the setting on the direction register (DDR).
During a stoppage (SPL = 1), the lack of pull-up resistor is specified (high impedance).
This function is prohibited if an external bus is used. Do not write it to this register.
I Output pin registers (ODR7, ODR4)
The bit configuration of output pin registers (ODR7, ODR4) is shown in the figure below.
ODR7
Address:00001E
ODR4
Address:00001B
Output pin registers (ODR7, ODR4) perform open drain control in the output mode.
• 0: Sets a standard output port to the output mode
• 1: Sets an open-drain output port to the output mode
Output pin registers have no function in the input mode (Output Hi-Z).
The input or output mode is determined by the setting of the direction register (DDR).
This function is prohibited when an external bus is used. Do not write it to this register.
7 6 5
RD07 RD06 RD05 RD04 RD03 RD02 RD01 RD00
H
7 6 5
RD17 RD16 RD15 RD14 RD13 RD12 RD11 RD10
H
7 6 5
- - OD75 OD74 OD73 OD72 OD71 OD70
H
7 6 5
OD47 OD46 OD45 OD44 OD43 OD42 OD41 OD40
H
4 3 2 1
4 3 2 1
4 3 2 1
4 3 2 1
CHAPTER 8 I/O PORT
0 Initial value Access
00000000 R/W
0
00000000 R/W
0 Initial value Access
--000000 R/W
0
00000000 R/W
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