Operation Of Expanded I/O Serial Interface - Fujitsu F2MC-16LX Hardware Manual

CHAPTER 20 EXPANDED I/O SERIAL INTERFACE

20.3 Operation of Expanded I/O Serial Interface

The expanded I/O serial interface consists of the serial mode control status register
(SMCS) and shift register (SDR). This interface is used for input and output of 8-bit
serial data.
This section describes the operations of the expanded I/O serial interface.
I Overview of operation of expanded I/O serial interface
Input and output with the serial data input/output function are performed as follows:
❍ Serial data input
By synchronizing the shift register with the falling edges of a serial shift clock (external or
internal clock), data is output to the serial output pin (SOT1 pin) in bit sequences.
❍ Serial data output
Synchronized with the rising edge of a serial shift clock (external or internal clock), data is input
to the SDR (shift register) from a serial input pin (Pin SIN1).
The shift direction (data transfer beginning with the MSB or LSB) can be specified by the bit
direction specify (BDS) bit of the serial mode control status register (SMCS).
After data transfer is completed, the operation enters the stop state or data register R/W wait
state as determined by the MODE bit of the serial mode control status register (SMCS). Perform
the following operation to change from each state to the transfer state:
• For return from the stop state, set the STOP bit to "0" and write "1" to the STRT bit to set it.
(STOP and STRT can be set simultaneously)
• For return from the R/W wait state of the serial shift data register, perform a read or write
operation for the data register.
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