Fujitsu F2MC-16LX Hardware Manual page 102

Mb90470 series 16-bit microcontroller
Hide thumbs Also See for F2MC-16LX:
Table of Contents

Advertisement

CHAPTER 3 INTERRUPT
I Extended Intelligent I/O Service (EI
The Extended Intelligent I/O service (EI
update/fix the buffer address pointer and I/O register address pointer and to set the transfer
data format (in bytes or words) and transfer direction.
Bit
7
6
RESV RESV RESV
R/W
R/W
R/W :
Read-write
X
:
Undefined
*1
: Only the lower 16 bits of the buffer address pointer change.
The buffer address pointer can only be incremented.
*2
: The address pointer can only be incremented.
86
2
OS) Status Register (ISCS)
Figure 3.7-5 Configuration of EI
5
4
3
2
IF
BW
BF
DIR
R/W
R/W
R/W
R/W
SE
0
Not terminated by a request from the peripheral function.
Terminated by a request from the peripheral function
1
DIR
0
I/O register address pointer -> buffer address pointer.
Buffer address pointer -> I/O register address pointer
1
BF
0
After data transfer, the buffer address pointer is updated. (*1)
1
After data transfer, the buffer address pointer is not updated.
BW
Byte
0
1
Word
IF
0
After data transfer, the I/O register address pointer is updated. (*2)
1
After data transfer, the buffer address pointer is not updated.
RESV
0 must be written to these bits.
2
OS) status register (ISCS) is an eight-bit register to
2
OS status register (ISCS)
1
0
Initial value
XXXXXXXX
SE
B
R/W
R/W
2
EI
OS
termination control bit
Data transfer direction specification bit
BAP update/fixed selection bit
Transfer data length specification bit
IOA update/fixed selection bit
Reserved bits

Advertisement

Table of Contents
loading

Table of Contents