16-Bit Free-Running Timer - Fujitsu F2MC-16LX Hardware Manual

12.2.1 16-bit free-running timer

The 16-bit free-running timer consists of a 16-bit up/down counter and control status
register.
The value of this timer counter is used as the base time (timebase timer) of input
capture and output compare.
• The clock used for counter operation can be selected out of 8 types.
• A counter overflow interrupt may be generated.
• By setting the mode, the counter is initialized if the output compare and the
compare clear register have matching values.
I List of 16-bit free-running timer registers
Figure 12.2-4 "16-bit free-running timer registers" shows a list of the 16-bit free-running timer
registers.
15
000067 CL15 CL14 CL13 CL12 CL11 CL10 CL09 CL08
H
(R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) Initial value XXXXXXXX
7
000066 CL07 CL06 CL05 CL04 CL03 CL02 CL01 CL00
H
(R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) Initial value XXXXXXXX
15
000063 T15
H
(R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) Initial value 00000000
7
000062 T07
H
(R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) Initial value 00000000
15
000065 ECKE
H
(R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) Initial value 0 - - 00000
7
000064 IVF
H
(R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) Initial value 00000000
Figure 12.2-4 16-bit free-running timer registers
14 13 12 11
6 5 4 3
14 13 12 11
T14 T13 T12 T11
6 5 4 3
T06 T05 T04 T03
14 13 12 11
- - MSI2 MSI1 MSI0 ICLR ICRE
6 5 4 3
IVFE STOPMODE SCLR CLK2 CLK1 CLK0 Timer counter control/status register
CHAPTER 12 16-BIT INPUT/OUTPUT TIMER
10 9 8 CPCLR
Compare clear register
2 1 0 CPCLR
Compare clear register
10 9 8 TCDT
T10 T09 T08 Timer counter data register
2 1 0 TCDT
T02 T01 T00 Timer counter data register
10 9 8 TCCS
Timer counter control/status register
2 1 0 TCCS
B
B
B
B
B
B
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