Watch Timer Operation - Fujitsu F2MC-16LX Hardware Manual

CHAPTER 11 WATCH TIMER

11.4 Watch Timer Operation

The watch timer functions as a clock source for the watchdog timer, timer for the
oscillation stabilization wait time of the sub-clock, and interval timer to generate
interrupts at fixed intervals.
I Watch counter
The watch counter is composed of a 15-bit counter to count the sub-clock, and it always
continues counting as long as the sub-clock is input.
❍ Clearing the watch counter
The operation of clearing the watch counter is affected by a power-on reset, a transition to the
stop mode, and writing "0" to the watch counter clear bit (WTR) in the watch timer control
register (WTC).
Note:
Clearing the clock counter affects the watchdog counter and interval interrupts that use clock
timer output.
To clear the clock timer by writing "0" to the WTR bit in the clock timer control register
(WTC), set the WTIE bit to "0" and set the clock timer to interrupt inhibited state. Before
permitting an interrupt, clear the interrupt request issued by writing "0" to the WTOF flag.
I Interval interrupt function of watch timer
This function generates interrupts at fixed intervals by using the carry signals of the watch
counter.
❍ Specification of the interval time
The interval time can be specified with the WTC2, WTC1, and WTC0 bits in the WTC register.
❍ Generation of watch timer interrupts
The watch timer interrupt request flag bit (WTOF) is set to "1" at each interval time specified by
the WTC2-0 bits. Consequently, when interrupts are permitted by setting the watch timer
interval interrupt permit bit (WTIE) to "1", a watch timer interrupt occurs.
The timing, when the WTOF bit is set, depends on the timing as a time reference when the
watch timer was cleared for the last time.
Because the watch timer is used as the timer for the oscillation stabilization wait time of the sub-
clock after a transition to the stop mode, the WTOF bit is cleared immediately after the transition
to this mode.
I Clock source for watchdog timer specifying function
The clock source for the watchdog timer can be specified with the watchdog timer clock source
selection bit (WDCS) of the WTC register. If the sub-clock is used as the machine clock, set the
WDCS bit to "0" and select the output of the watch timer. If the mode transits to the sub-clock
mode with the WDCS bit setting to "1", the watchdog timer stops.
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