Fujitsu F2MC-16LX Hardware Manual page 360

CHAPTER 17 8/16-BIT PPG TIMER
I Relationship between reload value and pulse width
The width of the output pulse can be calculated by adding1 to the reload register value, and
multiplying the result by the count clock interval. In other words, if the reload register value
during 8-bit PPG operation is 00
be equal to one interval length of the count clock. If the reload register value during 8-bit PPG
operation is FF
width is equal to 65,536 intervals of the count clock if the reload register value during 16-bit
PPG operation is FFFF
P = T x (L + 1)
L
P = T x (H + 1)
H
Where
P : Width of L pulse
L
P : Width of H pulse
H
T: Input clock interval
L: PRLL value
H: PRLH value
I Selection of count clock
The 8/16-bit PPG timer uses the input from the peripheral device clock and timebase counter as
a counter clock, allowing a selection from six types of count clock input.
Bits 4 to 2 of the PPG01/23/45 registers (PCM2 to 0) are used to select the clock of channel 0
(channel 2 or channel 4), and bits 7 to 5 of the PPG01/23/45 registers (PCS2 to 0) are used to
select the clock of channel 1 (channel 3, or channel5).
The clock is selected from among the machine clock multiplied by 1/16 to 1, and the timebase
counter input.
Note:
• In 8-bit prescaler/8-bit PPG mode and in 16-bit PPG mode, the value in bit 14 of the PPGC1
register (PCS1) is invalid.
• If the input from timebase timer is used, the first count cycle after a trigger or stop event may
be out of sync. If the timebase timer is initialized while the 8/16-bit PPG timer is running,
cycles may be out of sync.
• If, in 8-bit prescaler/8-bit PPG mode, channel 0/2/4 is in active mode and channel 1/3/5 is in
stopped mode, the first count cycle may be out of sync when operation of channel 1 (channel
3 or channel 5) starts.
I Pin output control of pulses
Pulses generated by the 8/16-bit PPG timer are output from the external pins (PPG0 to 5). To
output pulses from an external pin, set the bit corresponding to the pin to "1". For enabling
PPG0/2/4 pin output, bit 5 of PPGC0 (PE0) is used, and for enabling PPG1/3/5 pin output, bit 3
of PPGC1 (PE1) is used. If the respective bit is set to "0" (initial value), the external pin does not
output pulses, but is used as a general-purpose port.
In 16-bit PPG mode, PPG0 to PPG5 output the same waveform. For this reason, it is sufficient
to enable pin output for either of the corresponding pins to obtain the same output.
In 8-bit prescaler/8-bit PPG mode, PPG0/2/4 output a toggle waveform of the 8- bit prescaler,
and PPG1/3/5 output a waveform of 8-bit PPG.
344
, or that in 16-bit PPG operation is 0000
H
, the pulse width is equal to 256 intervals of the count clock, while the pulse
H
. The pulse width is expressed with the formula below:
H
, the pulse width will
H