Table Of Contents - Fujitsu F2MC-16LX Hardware Manual
Mb90470 series 16-bit microcontroller
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Also See for F2MC-16LX:
- Hardware manual (706 pages) ,
- Application note (13 pages) ,
- Operation manual (10 pages)
Table of Contents
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CONTENTS
OVERVIEW OF MB90470 ............................................................................. 1
1.1
Overview ................................................................................................................................................ 2
1.2
Block Diagram of MB90470 ................................................................................................................... 5
1.3
Package Dimensions ............................................................................................................................. 6
1.4
Pin Assignment ...................................................................................................................................... 8
1.5
Pin Functions ....................................................................................................................................... 10
1.6
I/O Circuit Type .................................................................................................................................... 16
1.7
Handling the Device ............................................................................................................................. 19
CPU ............................................................................................................. 21
2.1
Overview of CPU Specifications .......................................................................................................... 22
2.2
Memory Space ..................................................................................................................................... 23
2.3
CPU Registers ..................................................................................................................................... 27
2.3.1
Accumulator (A) .............................................................................................................................. 29
2.3.2
User Stack Pointer (USP) and System Stack Pointer (SSP) .......................................................... 30
2.3.3
Processor Status (PS) .................................................................................................................... 31
2.3.4
Program Counter (PC) .................................................................................................................... 34
2.3.5
Program Count Bank Register (PCB) ............................................................................................. 35
2.3.6
Direct Page Register (DPR) ........................................................................................................... 36
2.3.7
General-Purpose Register (Register Bank) .................................................................................... 37
2.4
Prefix Codes ........................................................................................................................................ 38
INTERRUPT ................................................................................................ 41
3.1
Overview .............................................................................................................................................. 42
3.2
Interrupt Factor and Interrupt Vector ................................................................................................... 44
3.3
Interrupt Control Register and Peripheral Function ............................................................................. 47
3.3.1
Interrupt Control Register (ICR00 to ICR15) .................................................................................. 49
3.3.2
Interrupt Control Register Functions ............................................................................................... 52
3.4
Hardware Interrupt ............................................................................................................................... 55
3.4.1
Hardware Interrupt Operation ......................................................................................................... 58
3.4.2
Flow of Hardware Interrupt Operation ............................................................................................ 60
3.4.3
Procedure for Using Hardwar Interrupt ........................................................................................... 61
3.4.4
Multiple Interrupts ........................................................................................................................... 63
3.4.5
Hardware Interrupt Processing Time .............................................................................................. 65
3.5
Software Interrupt ................................................................................................................................ 67
Interrupt by µDMA ............................................................................................................................... 69
3.6
3.6.1
DMA Descriptor .............................................................................................................................. 73
3.6.2
Individual Registers of DMA Descriptor .......................................................................................... 75
3.6.3
DMA Processing Procedure ........................................................................................................... 78
µDMA Processing Time .................................................................................................................. 79
3.6.4
3.7
3.7.1
3.7.2
3.7.3
2
OS) .......................................................................... 81
2
OS) Descriptor (ISD) ............................................................. 83
2
OS) descriptor (ISD) ....................................... 85
2
OS) .................................................................. 88
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