Fujitsu F2MC-16LX Hardware Manual page 356

CHAPTER 17 8/16-BIT PPG TIMER
[Bits 4, 3, 2] PCM2 to 0: ppg Count Mode (count clock selection)
These bits are used to select the operation clock for the down counter of channels 0, 2, and
4.
PCM2
0
0
0
0
1
1
• These bits are initialized to "000" at reset.
• Reading and writing are allowed.
[Bits 1, 0] reserved bits
These bits are reserved. When setting PPG01, PPG23, or PPG45, set these bits to "00".
340
PCM1 PCM0
0 0 Peripheral device clock (62.5 ns machine clock for 16 MHz)
0 1 Peripheral device clock/2 (125 ns machine clock for 16 MHz)
1 0 Peripheral device clock/4 (250 ns machine clock for 16 MHz)
1 1 Peripheral device clock/8 (500 ns machine clock for 16 MHz)
Peripheral device clock/16 (1 µs machine clock for 16 MHz)
0 0
Input clock from the timebase counter
1 1
9 x 250 ns = 128 µs oscillation for 4 MHz)
(2
Operation mode