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CHAPTER 19 512 KBIT FLASH MEMORY
19.7
Check the Execution State of Automatic Algorithm
Since the programming/erasing flow is controlled by the automatic algorithm, hardware
sequence flag can check the internal operating state inside of flash memory.
I Hardware Sequence Flags
G
Overview of hardware sequence flag
The hardware sequence flag consists of the following 5-bit outputs:
• Data polling flag (DQ7)
• Toggle bit flag (DQ6)
• Timing limit over flag (DQ5)
• Sector erasing timer flag (DQ3)
• Toggle bit 2 flag (DQ2)
These flags can be used to check completion of programming, chip and sector erasing, and
whether erase code writing are enabled.
The hardware sequence flags can be referred by setting command sequences and performing
read access to the address of a target sector in flash memory. The hardware sequence flag
should be output from the bank of only command published side. Table 19.7-1 "Bit Allocation of
Hardware Sequence Flags" gives the bit allocation of the hardware sequence flags.
Table 19.7-1 Bit Allocation of Hardware Sequence Flags
Hardware sequence flag
• To identify whether automatic programming/chip and sector erasing is in execution or
terminated, check the hardware sequence flag or the flash memory programming/erasing
status bit (FMCS: RDY) in the flash memory control status register. Programming/erasing is
terminated, returning to the read/reset state.
• To create a programming/erasing program, use the DQ7, DQ6, DQ5, DQ3 and DQ2 flags to
check that automatic programming/erasing is terminated and read data.
• The hardware sequence flags can also be used to check whether the second and later sector
erase code writing is enabled.
590
Bit No.
7
DQ7
6
5
4
−
DQ6
DQ5
3
2
1
−
DQ3
DQ2
0
−
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