Fujitsu F2MC-16LX Hardware Manual page 528

APPENDIX
Table A-2 I/O Map (Continued)
Address
BD Interrupt control register 13
H
BE Interrupt control register 14
H
BF Interrupt control register 15
H
C0 Chip selection MASK register 0
H
C1 Chip selection area register 0
H
C2 Chip selection MASK register 0
H
C3 Chip selection area register 0
H
C4 Chip selection MASK register 0
H
C5 Chip selection area register 0
H
C6 Chip selection MASK register 0
H
C7 Chip selection area register 0
H
C8 Chip selection control register
H
Chip selection control active level
C9
H
CA
H
Control status register
CB
H
CC
H 16-bit timer register/16-bit reload
CD
H
CE to
H
CF
H
D0 to
H
FF
H
100 to #
H H
512
Register
register
register
Abbreviation Access
ICR13 R/W
ICR14 R/W
ICR15 R/W
CMR0 R/W
CAR0 R/W
CMR1 R/W
CAR1 R/W
CMR2 R/W
CAR2 R/W
CMR3 R/W
CAR3 R/W
CSCR R/W
CALR R/W
TMCSR R/W
TMR/
R/W
TMRLR
Reserved area
External area
RAM area
Resource Initial value
XXXX0111
Interrupt controller XXXX0111
XXXX0111
00001111
11111111
00001111
11111111
00001111
Chip selection
11111111
facility
00001111
11111111
----000*
----0000
00000000
----0000
16-bit reload timer
XXXXXXXX