12.3.6 Timing of input capture
This section describes a capture timing of the input signal for capture.
I Capture timing to input signal
Figure 12.3-10 "Capture timing of input signal for input capture" shows the capture timing of
input signal for input capture.
Figure 12.3-10 Capture timing of input signal for input capture
Counter value
Input capture
Capture signal
Capture register
Interrupt
φ
N
CHAPTER 12 16-BIT INPUT/OUTPUT TIMER
N+1
Valid edge
N+1
247