Operation Of Delay Interrupt Event Module - Fujitsu F2MC-16LX Hardware Manual

CHAPTER 3 INTERRUPT

3.11.1 Operation of Delay Interrupt Event Module

If CPU software writes "1" to the relevant DIRR bit with software, the request latch in
the delay interrupt event module is set to generate an interrupt request to the interrupt
controller.
I Operation of delay interrupt event module
If CPU software writes "1" to the relevant DIRR bit, the request latch in the delay interrupt event
module is set to generate an interrupt request to the interrupt controller. If other interrupt
requests have a priority lower than this interrupt or there are no other interrupt requests, the
interrupt controller generates an interrupt to the F
compares the interrupt request with the ILM bit in the internal CCR register, and if the request
level is higher than that of the ILM bit, the hardware interrupt processing micro-program starts
immediately after the instruction currently being executed is completed.
interrupt routine for this interrupt is executed. By writing "0" to the relevant DDIR bit within the
interrupt processing routine, this interrupt factor is cleared and the task is switched.
The above operation flow is illustrated in the Figure 3.11-2 "Operation of delay interrupt event
module".
Delay interrupt originate module
DDIR
I Notes on using delay interrupt event module (delay interrupt request latch)
This latch is set by writing "1" to the relevant DIRR bit, and cleared by writing "0" to the same
bit. Be sure to create software so that a factor is cleared in the interrupt processing routine.
Otherwise, interrupt processing starts soon after the system returns from interrupt factor
processing.
100
Figure 3.11-2 Operation of delay interrupt event module
Interrupt controller
Other
request
ICR
YY
ICR
XX
2
MC-16LX CPU.
2
F MC-16LX CPU
ICR
XX
CMP
ICR
XX
NTA
2
The F MC-16LX CPU
As a result, the
CMP