Receive Dma Operation - Analog Devices Blackfin ADSP-BF537 Hardware Reference Manual

functions while station management transfers are in progress. Alterna-
tively, the processor may determine the status of the transfer in progress
by reading the

Receive DMA Operation

Data flow between the MAC and the Blackfin peripheral subsystem takes
place via bidirectional descriptor based DMA. The element size for any
DMA transfer to and from the Ethernet MAC is restricted to 32 bits. In
the receive case, a queue or ring of DMA descriptor pairs are used, as illus-
trated in Figure
and status descriptors are labeled with a "B."
ActiveQueueHead
1A
DESCRIPTORS:
STATUS BUFFERS:
DATA BUFFERS:
DATA
Figure 8-5. Ethernet MAC Receive DMA Operation
ADSP-BF537 Blackfin Processor Hardware Reference
bit in the
STABUSY
8-5. In the figure, data descriptors are labeled with an "A"
Active DMA Descriptor
1B 2A
XXXX
DONE
DATA
register.
EMAC_STAADD
2B
0000
NOT DONE
DATA
Ethernet MAC
ActiveQueueEnd
3A 3B
END
0000
NOT DONE
8-11