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6.4 Operations of 8-Bit Timer/Event Counters 50 to 53
6.4.1 Operation as interval timer (8-bit)
The 8-bit timer/event counter operates as an interval timer that repeatedly generates an interrupt request at the
interval specified by the count value set in advance in 8-bit compare register 5n (CRn).
When the count value of 8-bit timer counter 5n (TM5n) matches the value set in CR5n, the value of TM5n is cleared
to 0. TM5n continues counting and an interrupt request signal (INTTM5n) is generated.
The count clock of TM5n can be selected by using bits 0 to 2 (TCL5n0 to TCL5n2) of timer clock select register
5n (TCL5n).
For the operation if the value of the compare register is changed while the timer count operation, refer to (2) in
6.5 Notes on 8-Bit Timer/Event Counters 50 to 53.
[Setting]
<1> Set each register.
• TCL5n:
Select a count clock.
• CR5n:
Compare value
• TMC5n: Select a mode in which TM5n is cleared and started on match between TM5n and CR5n
(TMC5n = 0000×××0B: × = Don't care).
<2> The count operation is started when TEC5n is set to 1.
<3> INTTM5n is generated if the values of TM5n and CR5n match (TM5n is cleared to 00H).
<4> After that, INTTM5n is repeatedly generated at fixed intervals. To stop the count operation, clear TCE5n
to 0.
Remark n = 0 to 3
CHAPTER 6 8-BIT TIMER/EVENT COUNTERS 50 TO 53
User's Manual U15104EJ2V0UD
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