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The V850/SB1 and V850/SB2 are provided with an external bus interface function by which external memories
such as ROM and RAM, and I/O can be connected.
4.1 Features
•
Address bus (capable of separate output)
•
16-bit data bus
•
Able to be connected to external devices via the pins that have alternate functions as ports
•
Wait function
• Programmable wait function, capable of inserting up to 3 wait states per 2 blocks
• External wait control through WAIT pin input
•
Idle state insertion function
•
Bus mastership arbitration function
•
Bus hold function
4.2 Bus Control Pins and Control Register
4.2.1 Bus control pins
The following pins are used for interfacing with external devices.
Address/data bus (AD0 to AD7)
Address/data bus (AD8 to AD15)
Address bus (A1 to A4)
Address bus (A5 to A12)
Address bus (A13 to A15)
Address bus (A16 to A21)
Read/write control (LBEN, UBEN, R/W, DSTB, WRL, WRH, RD)
Address strobe (ASTB)
Bus hold control (HLDRQ, HLDAK)
External wait control (WAIT)
The bus interface function of each pin is enabled by specifying the memory expansion mode register (MM) or the
memory address output mode register (MAM). For the details of specifying an operation mode of the external bus
interface, refer to 3.4.6 (1) Memory expansion mode register (MM) and (2) Memory address output mode
register (MAM).
Caution For debugging using the separate bus, refer to the user's manual of the corresponding in-circuit
emulator.
128
CHAPTER 4
BUS CONTROL FUNCTION
Table 4-1. Bus Control Pins
External Bus Interface Function
User's Manual U13850EJ6V0UD
Corresponding Port (Pins)
Port 4 (P40 to P47)
Port 5 (P50 to P57)
Port 11 (P110 to P113)
Port 10 (P100 to P107)
Port 3 (P34 to P36)
Port 6 (P60 to P65)
Port 9 (P90 to P93)
Port 9 (P94)
Port 9 (P95, P96)
Port 11 (P110)
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