Table 185. Fsmc_Btrx Bit Fields; Table 186. Fsmc_Bwtrx Bit Fields - ST STM32F205 series Reference Manual

Flexible static memory controller (FSMC)
Bit
number
3-2
1
0
Bit
number
31:30
29-28
27-24
23-20
19-16
15-8
7-4
3-0
Bit
number
31:30
29-28
27-24
23-20
19-16
15-8
7-4
3-0
Note: The FSMC_BWTRx register is valid only if extended mode is set (mode B), otherwise all its
content is don't care.
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Table 184. FSMC_BCRx bit fields (continued)
Bit name
MTYP[0:1] 0x2 (NOR Flash memory)
MUXEN 0x0
MBKEN 0x1

Table 185. FSMC_BTRx bit fields

Bit name
Reserved 0x0
ACCMOD 0x1
DATLAT Don't care
CLKDIV Don't care
BUSTURN Time between NEx high to NEx low (BUSTURN HCLK)
Duration of the second access phase (DATAST HCLK cycles) for
DATAST
read accesses.
ADDHLD Don't care
Duration of the first access phase (ADDSET HCLK cycles) for read
accesses.
ADDSET[3:0]
Minimum value for ADDSET is 0.

Table 186. FSMC_BWTRx bit fields

Bit name
Reserved 0x0
ACCMOD 0x1
DATLAT Don't care
CLKDIV Don't care
BUSTURN Time between NEx high to NEx low (BUSTURN HCLK)
Duration of the second access phase (DATAST+1 HCLK cycles for
DATAST
write accesses,
ADDHLD Don't care
Duration of the first access phase (ADDSET HCLK cycles) for write
accesses.
ADDSET[3:0]
Minimum value for ADDSET is 0.
RM0033 Rev 8
Value to set
Value to set
Value to set
RM0033