Appendix A. Instruction Summary; Instruction Formats - IBM PPC440X5 CPU Core User Manual

Preliminary

Appendix A. Instruction Summary

This appendix describes the various instruction formats, and lists all of the PPC440x5 instructions summa-
rized alphabetically and by opcode.
Appendix A.1 on page 519 illustrates the PPC440x5 instruction forms (allowed arrangements of fields within
instructions).
Appendix A.2 on page 524 lists all PPC440x5 mnemonics, including extended mnemonics. A short functional
description is included for each mnemonic.
Appendix A.3 on page 557 identifies those opcodes which are allocated by PowerPC Book-E for implementa-
tion-dependent usage, including auxiliary processors.
Appendix A.4 on page 557 identifies those opcodes which are identified by PowerPC Book-E as "preserved"
for compatibility with previous versions of the architecture.
Appendix A.5 on page 558 indentifies those opcodes which are "reserved" for use by future versions of the
architecture.
Appendix A.6 on page 559, lists all instructions implemented within the PPC440x5 core, sorted by primary
and secondary opcodes. Extended mnemonics are not included in the opcode list, but allocated, preserved,
and reserved-nop opcodes are included.
A.1 Instruction Formats
Instructions are four bytes long. Instruction addresses are always word-aligned.
Instruction bits 0 through 5 always contain the primary opcode. Many instructions have an extended opcode
in another field. Remaining instruction bits contain additional fields. All instruction fields belong to one of the
following categories:
• Defined
These instructions contain values, such as opcodes, that cannot be altered. The instruction format dia-
grams specify the values of defined fields.
• Variable
These fields contain operands, such as GPR selectors and immediate values, that can vary from execu-
tion to execution. The instruction format diagrams specify the operands in the variable fields.
• Reserved
Bits in reserved fields should be set to 0. In the instruction format diagrams, /, //, or /// indicate reserved
fields.
If any bit in a defined field does not contain the expected value, the instruction is illegal and an illegal instruc-
tion exception occurs. If any bit in a reserved field does not contain 0, the instruction form is invalid; its result
is architecturally undefined. The PPC440x5 core executes all invalid instruction forms without causing an
illegal instruction exception.
instalfa.fm.
September 12, 2002
User's Manual
PPC440x5 CPU Core
Page 519 of 589