Stswi - IBM PPC440X5 CPU Core User Manual

Preliminary

stswi

Store String Word Immediate
stswi RS, RA, NB
31
0 6
EA (RA|0)
if NB = 0 then
n 32
else
n NB
r RS – 1
i 0
do while n > 0
if i = 0 then
r r + 1
if r = 32 then
r 0
MS(EA,1) (GPR(r)
i i + 8
if i = 32 then
i 0
EA EA + 1
n n – 1
An effective address (EA) is determined by the RA field. If the RA field contains 0, the EA is 0; otherwise, the
EA is the contents of register RA.
A byte count is determined by the NB field. If the NB field contains 0, the byte count is 32; otherwise, the byte
count is the contents of the NB field.
The contents of a series of consecutive GPRs (starting with register RS, continuing through GPR(31) and
wrapping to GPR(0) as necessary, and continuing to the final byte count) are stored, starting at the EA. The
bytes in each GPR are accessed starting with the most significant byte. The byte count determines the
number of transferred bytes.
If instruction bit 31 contains 1, the contents of CR[CR0] are undefined.
Registers Altered
• None
Invalid Instruction Forms
• Reserved fields
instrset.fm.
September 12, 2002
RS RA
11
)
i:i+7
PPC440x5 CPU Core User's Manual
NB
16 21
stswi
Store String Word Immediate
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31
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