Instruction Byte Ordering - IBM PPC440X5 CPU Core User Manual

User's Manual
PPC440x5 CPU Core
Big Endian Mapping
The big endian mapping of structure
in hexadecimal, are below the data stored at the address. The contents of each byte, as defined in structure
s , is shown as a (hexadecimal) number or character (for the string elements). The shaded cells correspond to
padded bytes.
Little Endian Mapping
Structure s is shown mapped little endian.

2.1.3.2 Instruction Byte Ordering

PowerPC Book-E defines instructions as aligned words (four bytes) in memory. As such, instructions in a big
endian program image are arranged with the most-significant byte (MSB) of the instruction word at the
lowest-numbered address.
Consider the big endian mapping of instruction p at address 0x00, where, for example, p = add r7, r7, r4:
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s follows (the data is highlighted in the structure mappings). Addresses,
11 12 13 14
0x00 0x01 0x02 0x03
21 22 23 24
0x08 0x09 0x0A 0x0B
31 32 33 34
0x10 0x11 0x12 0x13
'E' 'F' 'G'
0x18 0x19 0x1A 0x1B
61 62 63 64
0x20 0x21 0x22 0x23
14 13 12 11
0x00 0x01 0x02 0x03
28 27 26 25
0x08 0x09 0x0A 0x0B
34 33 32 31
0x10 0x11 0x12 0x13
'E' 'F' 'G'
0x18 0x19 0x1A 0x1B
64 63 62 61
0x20 0x21 0x22 0x23
MSB
0x00 0x01
0x04 0x05 0x06 0x07
25 26 27 28
0x0C 0x0D 0x0E 0x0F
'A' 'B' 'C' 'D'
0x14 0x15 0x16 0x17
51 52
0x1C 0x1D 0x1E 0x1F
0x24 0x25 0x26 0x27
0x04 0x05 0x06 0x07
24 23 22 21
0x0C 0x0D 0x0E 0x0F
'A' 'B' 'C' 'D'
0x14 0x15 0x16 0x17
52 51
0x1C 0x1D 0x1E 0x1F
0x24 0x25 0x26 0x27
LSB
0x02 0x03
Preliminary
prgmodel.fm.
September 12, 2002