Count Register (Ctr); Condition Register (Cr); Figure 2-3. Link Register (Lr); Figure 2-4. Count Register (Ctr) - IBM PPC440X5 CPU Core User Manual

Preliminary
When being used as a return address by a bclr instruction, bits 30:31 of the LR are ignored, since all instruc-
tion addresses are on word boundaries.
Access to the LR is non-privileged.
0

Figure 2-3. Link Register (LR)

0:31 Link Register contents

2.5.5.2 Count Register (CTR)

The CTR is written from a GPR using
can be used as a loop count that gets decremented and tested by conditional branch instructions that specify
count decrement as one of their branch conditions (instruction field BO[2] = 0). Alternatively, the CTR
contents can specify a target address for the
Access to the CTR is non-privileged.
0

Figure 2-4. Count Register (CTR)

0:31 Count

2.5.5.3 Condition Register (CR)

The CR is used to record certain information ("conditions") related to the results of the various instructions
which are enabled to update the CR. A bit in the CR may also be selected to be tested as part of the condition
of a conditional branch instruction.
The CR is organized into eight 4-bit fields (CR0–CR7), as shown in Figure 2-5. Table 2-24 lists the instruc-
tions which update the CR.
Access to the CR is non-privileged.
prgmodel.fm.
September 12, 2002
mtspr , and can be read into a GPR using mfspr . The CTR contents
bcctr instruction, enabling indirect branching to any address.
Target address of bclr instruction
Used as count for branch conditional with decre-
ment instructions, or as target address for bcctr
instructions
User's Manual
PPC440x5 CPU Core
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