Andi - IBM PPC440X5 CPU Core User Manual

andi.

AND Immediate
PPC440x5 CPU Core User's Manual
andi.
AND Immediate
andi. RA, RS, IM
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0 6
16
(RA) (RS) ( 0
The IM field is extended to 32 bits by concatenating 16 0-bits on its left. The contents of register RS is ANDed
with the extended IM field; the result is placed into register RA.
Registers Altered
• RA
• CR[CR0]
Programming Note
The andi. instruction can test whether any of the 16 least-significant bits in a GPR are 1-bits.
andi. is one of three instructions that implicitly update CR[CR0] without having an Rc field. The other instruc-
tions are addic. and andis. .
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RS RA
11
IM)
16
Preliminary
IM
instrset.fm.
September 12, 2002
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