Srw - IBM PPC440X5 CPU Core User Manual

srw

Shift Right Word
PPC440x5 CPU Core User's Manual
srw
Shift Right Word
srw RA, RS, RB
srw. RA, RS, RB
31
0 6
n (RB)
26:31
r ROTL((RS), 32 – n)
if n < 32 then
m MASK(n, 31)
else
32
m 0
(RA) r m
The contents of register RS are shifted right by the number of bits specified the contents of register RB
Bits shifted right out of the least significant bit are lost, and 0-bits fill the vacated bit positions on the left. The
result is placed into register RA.
Note that if RB = 1, then the shift amount is 32 bits or more, and thus all bits are shifted out such that
26
register RA is set to zero.
Registers Altered
• RA
• CR[CR0] if Rc contains 1
Page 408 of 589
RS RA
11
Rc=0
Rc=1
RB
16 21
Preliminary
536 Rc
31
.
26:31
instrset.fm.
September 12, 2002