Tlbsync - IBM PPC440X5 CPU Core User Manual

tlbsync

TLB Synchronize
PPC440x5 CPU Core User's Manual
tlbsync
TLB Synchronize
tlbsync
31
0 6
The tlbsync instruction is provided by the PowerPC Book-E architecture to support synchronization of TLB
operations between processors in a coherent multi-processor system. Since the PPC440x5 core does not
support coherent multi-processing, this instruction performs no operation, and is provided only to facilitate
code portability.
If instruction bit 31 contains 1, the contents of CR[CR0] are undefined.
Registers Altered
• None
Invalid Instruction Forms
• Reserved fields
Programming Note
This instruction is privileged. Translation is not required to be active during the execution of this instruction.
Since the PPC440x5 core does not support tightly-coupled multiprocessor systems, tlbsync performs no
operation.
Page 438 of 589
566
21
September 12, 2002
Preliminary
31
instrset.fm.