Wrtee - IBM PPC440X5 CPU Core User Manual

Cpu core
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wrtee

Write External Enable
PPC440x5 CPU Core User's Manual
wrtee
Write External Enable
wrtee
RS
31
0
6
MSR[EE]
(RS)
16
MSR[EE] is set to the value specified by bit 16 of register RS.
If instruction bit 31 contains 1, the contents of CR[CR0] are undefined.
Registers Altered
• MSR[EE]
Invalid Instruction Forms:
• Reserved fields
Programming Notes
Execution of this instruction is privileged.
This instruction is typically used as part of a code sequence which can provide the equivalent of an atomic
read-modify-write of the MSR, as follows:
mfmsr Rn
#save EE in Rn[16]
wrteei 0
#Turn off EE (leaving other bits unchanged)
#Code with EE disabled
wrtee Rn
#restore EE without affecting any MSR changes that occurred in the disabled code
Page 446 of 589
RS
11
131
21
September 12, 2002
Preliminary
31
instrset.fm.

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