Lhaux - IBM PPC440X5 CPU Core User Manual

Preliminary

lhaux

Load Halfword Algebraic with Update Indexed
lhaux RT, RA, RB
31
0 6
EA (RA|0) + (RB)
(RA) EA
(RT) EXTS(MS(EA,2))
An effective address (EA) is formed by adding an index to a base address. The index is the contents of
register RB. The base address is 0 if the RA field is 0 and is the contents of register RA otherwise. The EA is
placed into register RA.
The halfword at the EA is sign-extended to 32 bits and placed into register RT.
If instruction bit 31 contains 1, the contents of CR[CR0] are undefined.
Registers Altered
• RA
• RT
Invalid Instruction Forms
• Reserved fields
• RA = RT
• RA = 0
instrset.fm.
September 12, 2002
RT RA
11
Load Halfword Algebraic with Update Indexed
PPC440x5 CPU Core User's Manual
RB
16 21
lhaux
375
31
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