Lbzx - IBM PPC440X5 CPU Core User Manual

Cpu core
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lbzx

Load Byte and Zero Indexed
PPC440x5 CPU Core User's Manual
lbzx
Load Byte and Zero Indexed
lbzx
RT,RA, RB
31
0
6
EA
(RA|0) + (RB)
24
(RT)
0 || MS(EA,1)
An effective address (EA) is formed by adding an index to a base address. The index is the contents of
register RB. The base address is 0 if the RA field is 0 and is the contents of register RA otherwise.
The byte at the EA is extended to 32 bits by concatenating 24 0-bits to its left. The result is placed into
register RT.
If instruction bit 31 contains 1, the contents of CR[CR0] are undefined.
Registers Altered
• RT
Invalid Instruction Forms
• Reserved fields
Page 324 of 589
RT
RA
11
RB
16
21
Preliminary
87
31
instrset.fm.
September 12, 2002

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