Sraw - IBM PPC440X5 CPU Core User Manual

sraw

Shift Right Algebraic Word
PPC440x5 CPU Core User's Manual
sraw
Shift Right Algebraic Word
sraw RA, RS, RB
sraw. RA, RS, RB
31
0 6
n (RB)
26:31
r ROTL((RS), 32 – n)
if n < 32 then
m MASK(n, 31)
else
32
m 0
s (RS)
0
(RA) (r m) (
XER[CA] s ((r
The contents of register RS are shifted right by the number of bits specified the contents of register RB
Bits shifted out of the least significant bit are lost. Bit 0 of Register RS is replicated to fill the vacated positions
on the left. The result is placed into register RA.
If register RS contains a negative number and any 1-bits were shifted out of the least significant bit position,
XER[CA] is set to 1; otherwise, it is set to 0.
Note that if RB = 1, then the shift amount is 32 bits or more, and thus all bits are shifted out such that
26
register RA and XER[CA] are set to bit 0 of register RS.
Registers Altered
• RA
• XER[CA]
• CR[CR0] if Rc contains 1
Page 406 of 589
RS RA
11
32
s m)
m) 0)
Rc=0
Rc=1
RB
16 21
Preliminary
792 Rc
31
.
26:31
instrset.fm.
September 12, 2002