Decrementer (Dec); Figure 7-4. Decrementer (Dec) - IBM PPC440X5 CPU Core User Manual

Preliminary
lwz Ry, lower
li Rz, 0
mtspr TBL,Rz
mtspr TBU,Rx
mtspr TBL,Ry

7.2 Decrementer (DEC)

The DEC is a 32-bit privileged SPR that decrements at the same rate that the time base increments. The
DEC is read and written using
it begins to decrement with the next time base clock. A Decrementer exception is signalled when a decrement
occurs on a DEC count of 1, and the Decrementer Interrupt Status field of the Timer Status Register
(TSR[DIS]; see Page 216) is set. A Decrementer interrupt will occur if it is enabled by both the Decrementer
Interrupt Enable field of the Timer Control Register (TCR[DIE]; see Page 215) and by the External Interrupt
Enable field of the Machine State Register (MSR[EE]; see Machine State Register (MSR) on page 165).
Interrupts and Exceptions on page 159 provides more information on the handling of Decrementer interrupts.
The Decrementer interrupt handler software should clear TSR[DIS] before re-enabling MSR[EE], in order to
avoid another Decrementer interrupt due to the same exception (unless TCR[DIE] is cleared instead).
The behavior of the DEC itself upon a decrement from a DEC value of 1 depends on which of two modes it is
operating in -- normal, or auto-reload. The mode is controlled by the Auto-Reload Enable (ARE) field of the
TCR. When operating in normal mode (TCR[ARE]=0), the DEC simply decrements to the value 0 and then
stops decrementing until it is re-initialized by software.
When operating in auto-reload mode (TCR[ARE]=1), however, instead of decrementing to the value 0, the
DEC is reloaded with the value in the Decrementer Auto-Reload (DECAR) register (see Figure 7-5 on
page 212), and continues to decrement with the next time base clock (assuming the DECAR value was non-
zero). The DECAR register is a 32-bit privileged, write-only SPR, and is written using
The auto-reload feature of the DEC is disabled upon reset, and must be enabled by software.
Figure 7-4 illustrates the DEC.
0

Figure 7-4. Decrementer (DEC)

0:31 Decrement value
Figure 7-5 illustrates the DECAR.
timers.fm.
September 12, 2002
# set GPR Rz to 0
# force TBL to 0 (thereby preventing wrap into TBU)
# set TBU to initial value
# set TBL to initial value
mfspr and mtspr , respectively. When a non-zero value is written to the DEC,
User's Manual
PPC440x5 CPU Core
mtspr .
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