Lmw - IBM PPC440X5 CPU Core User Manual

lmw

Load Multiple Word
PPC440x5 CPU Core User's Manual
lmw
Load Multiple Word
lmw RT, D(RA)
46
0 6
EA (RA|0) + EXTS(D)
r RT
do while r 31
GPR(r)) MS(EA,4)
r r + 1
EA EA + 4
An effective address (EA) is formed by adding a displacement to a base address. The displacement is
obtained by sign-extending the 16-bit D field in the instruction to 32 bits. The base address is 0 if the RA field
is 0 and is the contents of register RA otherwise.
A series of consecutive words starting at the EA are loaded into a set of consecutive GPRs, starting with
register RT and continuing to and including GPR(31).
Registers Altered
• RT through GPR(31).
Invalid Instruction Forms
• RA is in the range of registers to be loaded, including the case RA = RT = 0.
Programming Note
This instruction can be restarted, meaning that it could be interrupted after having already updated some of
the target registers, and then re-executed from the beginning (after returning from the interrupt), in which
case the registers which had already been loaded prior to the interrupt will be loaded a second time. Note that
if RA is in the range of registers to be loaded (an invalid form; see above) and is also one of the registers
which is loaded prior to the interrupt, then when the instruction is restarted the re-calculated EA will be incor-
rect, since RA will no longer contain the original base address. Hence the definition of this as an invalid form
which software must avoid.
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RT RA
11 16
Preliminary
D
instrset.fm.
September 12, 2002
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