Table 9-10. Extended Mnemonics For Bclr, Bclrl - IBM PPC440X5 CPU Core User Manual

Preliminary

Table 9-10. Extended Mnemonics for bclr, bclrl

Mnemonic Operands
blr
blrl
bdnzlr
bdnzlrl
bdnzflr
cr_bit
bdnzflrl
bdnztlr
cr_bit
bdnztlrl
bdzlr
bdzlrl
bdzflr
cr_bit
bdzflrl
bdztlr
cr_bit
bdztlrl
instrset.fm.
September 12, 2002
Function
Branch unconditionally to address in LR.
Extended mnemonic for
bclr 20,0
Extended mnemonic for
bclrl 20,0
Decrement CTR.
Branch if CTR 0 to address in LR.
Extended mnemonic for
bclr 16,0
Extended mnemonic for
bclrl 16,0
Decrement CTR.
Branch if CTR 0 AND CR
cr_bit
Extended mnemonic for
bclr 0,cr_bit
Extended mnemonic for
bclrl 0,cr_bit
Decrement CTR.
Branch if CTR 0 AND CR
cr_bit
Extended mnemonic for
bclr 8,cr_bit
Extended mnemonic for
bclrl 8,cr_bit
Decrement CTR.
Branch if CTR = 0 to address in LR.
Extended mnemonic for
bclr 18,0
Extended mnemonic for
bclrl 18,0
Decrement CTR.
Branch if CTR = 0 AND CR
cr_bit
Extended mnemonic for
bclr 2,cr_bit
Extended mnemonic for
bclrl 2,cr_bit
Decrement CTR.
Branch if CTR = 0 AND CR
cr_bit
Extended mnemonic for
bclr 10,cr_bit
Extended mnemonic for
bclrl 10,cr_bit
Branch Conditional to Link Register
PPC440x5 CPU Core User's Manual
= 0 to address in LR.
= 1 to address in LR.
= 0 to address in LR.
= 1 to address in LR.
bclr
Other Registers
Altered
(LR) CIA + 4.
(LR) CIA + 4.
(LR) CIA + 4.
(LR) CIA + 4.
(LR) CIA + 4.
(LR) CIA + 4.
(LR) CIA + 4.
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