Icread - IBM PPC440X5 CPU Core User Manual

Cpu core
Table of Contents

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Preliminary

icread

Instruction Cache Read
icread
RA, RB
31
0
6
EA
(RA|0) + (RB)
INDEX
EA
17:26
WORD
EA
27:29
ICDBDR
(instruction cache data)[INDEX,WORD]
ICDBTRH
(instruction cache tag high)[INDEX]
ICDBTRL
(instruction cache tag low)[INDEX]
An effective address (EA) is formed by adding an index to a base address. The index is the contents of
register RB. The base address is 0 if the RA field is 0 and is the contents of register RA otherwise.
EA
selects a line of tag and data (instructions) from the instruction cache. EA
17:26
instruction from the 8-instruction data portion of the selected cache line, and this instruction is read into the
ICDBDR. EA
are ignored, as are EA
30:31
The tag portion of the selected cache line is read into the ICDBTRH and ICDBTRL registers, as follows:
Register[bit(s)]
ICDBTRH[0:23]
TEA
ICDBTRH[24]
V
ICDBTRH[25:31]
ICDBTRL[0:21]
ICDBTRL[22]
TS
ICDBTRL[23]
TD
ICDBTRL[24:31]
TID
The instruction cache on PPC440x5 is "virtually-tagged", which means that the tag field contains the virtual
address, which consists of the TEA, TS, and TID fields. See Memory Management on page 133 for more
information on the function of the TS, TD, and TID fields.
This instruction can be used by a debug tool to determine the contents of the instruction cache, without
knowing the specific addresses of the lines which are currently contained within the cache.
If instruction bit 31 contains 1, the contents of CR[CR0] are undefined.
instrset.fm.
September 12, 2002
RA
11
.
0:16
Tag
Name
Field
Tag Effective Address
Valid
reserved
reserved
Translation Space
Translation ID (TID) Disable
Translation ID
PPC440x5 CPU Core User's Manual
RB
16
21
Bits 0:23 of the 32-bit effective address associ-
ated with this cache line
The valid indicator for the cache line (1 indi-
cates valid)
Reserved fields are read as 0s
Reserved fields are read as 0s
The address space portion of the virtual
address associated with this cache line.
TID Disable field for the memory page associ-
ated with this cache line
TID field portion of the virtual address associ-
ated with this cache line
icread
Instruction Cache Read
998
31
selects a 32-bit
27:29
Page 317 of 589

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