lhax
Load Halfword Algebraic Indexed
PPC440x5 CPU Core User's Manual
lhax
Load Halfword Algebraic Indexed
lhax
RT, RA, RB
31
0
6
EA
(RA|0) + (RB)
(RT)
EXTS(MS(EA,2))
An effective address (EA) is formed by adding an index to a base address. The index is the contents of
register RB. The base address is 0 if the RA field is 0 and is the contents of register RA otherwise.
The halfword at the EA is sign-extended to 32 bits and placed into register RT.
If instruction bit 31 contains 1, the contents of CR[CR0] are undefined.
Registers Altered
• RT
Invalid Instruction Forms
• Reserved fields
Page 328 of 589
RT
RA
11
RB
16
21
Preliminary
343
31
instrset.fm.
September 12, 2002