Dtv0-Dtv3; Figure 10-19. Data Cache Transient Victim Registers (Dtv0-Dtv3) - IBM PPC440X5 CPU Core User Manual

DTV0–DTV3
Data Cache Transient Victim 0–3
PPC440x5 CPU Core User's Manual
DTV0–DTV3
SPR 0x394–0x397 Supervisor R/W
See Cache Line Replacement Policy on page 96.
VNDXA
0
Figure 10-19. Data Cache Transient Victim Registers (DTV0–DTV3)
Victim Index A (for cache lines with EA[25:26] =
0:7 VNDXA
0b00)
Victim Index B (for cache lines with EA[25:26] =
8:15 VNDXB
0b01)
Victim Index C (for cache lines with EA[25:26] =
16:23 VNDXC
0b10)
VNDXD Victim Index D (for cache lines with EA[25:26] =
24:31
0b11)
Page 484 of 589
7 8
VNDXB
VNDXC
15 16
For all victim index fields, the number of bits used
to select the cache way for replacement depends
on the implemented cache size. See Table 4-3, on
page -98
for more information.
Preliminary
23 24
VNDXD
regsumm440core.fm.
September 12, 2002
31