Analog Devices ADSP-SC58 Series Hardware Reference Manual page 3103

Sharc+ processor
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Packet Engine Command Descriptor Ring Base Address
The
PKTE_CDRBASE_ADDR
applicable in autonomous ring mode. The
command descriptors are directly written into the descriptor registers.
VALUE[31:16] (R/W)
Command Descriptor Ring Base Address
Figure 44-8: PKTE_CDRBASE_ADDR Register Diagram
Table 44-34: PKTE_CDRBASE_ADDR Register Fields
Bit No.
(Access)
31:0
VALUE
(R/W)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
register holds the command descriptor ring base address in host memory. It is only
PKTE_CDRBASE_ADDR
15
0
VALUE[15:0] (R/W)
Command Descriptor Ring Base Address
31
0
Bit Name
Command Descriptor Ring Base Address.
The PKTE_CDRBASE_ADDR.VALUE bit field specifies the base location of the
command descriptor ring in the host memory space.
register is ignored for all other modes when
14
13
12
11
10
9
8
7
0
0
0
0
0
0
0
0
30
29
28
27
26
25
24
23
0
0
0
0
0
0
0
0
Description/Enumeration
ADSP-SC58x PKTE Register Descriptions
6
5
4
3
2
1
0
0
0
0
0
0
0
0
22
21
20
19
18
17
16
0
0
0
0
0
0
0
44–55

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