Altera Cyclone IV Device Handbook page 71

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Table 5–3. GCLK Network Connections for Cyclone IV E Devices
GCLK Network Clock
Sources
0
1
(4)
DPCLK2
CDPCLK1, or
— —
(2),
(5)
CDPCLK2
(4)
DPCLK5
— —
(2)
DPCLK7
(4)
DPCLK4
— —
(2)
DPCLK6
(4)
DPCLK6
CDPCLK5, or
— —
(2),
(5)
CDPCLK6
(4)
DPCLK3
CDPCLK4, or
— —
(2),
(5)
CDPCLK3
— —
DPCLK8
— —
DPCLK11
— —
DPCLK9
— —
DPCLK10
— —
DPCLK5
— —
DPCLK2
— —
DPCLK4
— —
DPCLK3
Notes to
Table
5–3:
(1) EP4CE6 and EP4CE10 devices only have GCLK networks 0 to 9.
(2) These pins apply to all Cyclone IV E devices except EP4CE6 and EP4CE10 devices.
(3) EP4CE6 and EP4CE10 devices only have PLL_1 and PLL_2.
(4) This pin applies only to EP4CE6 and EP4CE10 devices.
(5) Only one of the two CDPCLK pins can feed the clock control block. You can use the other pin as a regular I/O pin.
(1)
(Part 3 of 3)
GCLK Networks
2
3
4
5
6
7
8
9
v v
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10 11 12 13 14 15 16 17 18 19
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v
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v
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v
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v v
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v
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v
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v
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v v

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