Fpp Configuration Timing - Altera Cyclone IV Device Handbook

8–44

FPP Configuration Timing

Figure 8–22
external host.
Figure 8–22. FPP Configuration Timing Waveform
nSTATUS (2)
CONF_DONE (3)
INIT_DONE
Notes to
(1) The beginning of this waveform shows the device in user mode. In user mode, nCONFIG, nSTATUS, and CONF_DONE
are at logic-high levels. When nCONFIG is pulled low, a reconfiguration cycle begins.
(2) After power up, the Cyclone IV device holds nSTATUS low during POR delay.
(3) After power up, before and during configuration, CONF_DONE is low.
(4) Do not leave DCLK floating after configuration. It must be driven high or low, whichever is more convenient.
(5) DATA[7..0] is available as a user I/O pin after configuration; the state of the pin depends on the dual-purpose pin
settings.
Table 8–13
Table 8–13. FPP Timing Parameters for Cyclone IV Devices (Part 1 of 2)
Symbol Parameter
nCONFIG low to
t
CF2CD
CONF_DONE low
nCONFIG low to
t
CF2ST0
nSTATUS low
nCONFIG low pulse
t
CFG
width
nSTATUS low pulse
t
STATUS
width
nCONFIG high to
t
CF2ST1
nSTATUS high
nCONFIG high to
t
first rising edge on
CF2CK
DCLK
Cyclone IV Device Handbook,
Volume 1
Chapter 8: Configuration and Remote System Upgrades in Cyclone IV Devices
shows the timing waveform for the FPP configuration when using an
t
CF2ST1
t
CFG
t
nCONFIG
CF2CK
t
CF2ST0
t
CF2CD
t
ST2CK
DCLK
DATA[7..0]
User I/O User mode Tri-stated with internal pull-up resistor
Figure 8–22:
lists the FPP configuration timing parameters for Cyclone IV devices.
Minimum
Cyclone IV (1)
—
—
500
45
—
(3)
230
(1)
t
STATUS
t
CLK
t
t
CH
CL
t
DH
Byte 0 Byte 1 Byte 2 Byte 3
t
DSU
Cyclone IV E (2) Cyclone IV
Configuration
(4)
(5)
User Mode
Byte n-1 Byte n
User Mode
t
CD2UM
Maximum
(1) Cyclone IV E (2)
500
500
—
(3)
230
(4)
230
—
May 2013 Altera Corporation
Unit
ns
ns
ns
µs
µs
µs