1–68
converted within the XGMII extender sublayer into an 8B/10B encoded data stream.
Each data stream is then transmitted across a single differential pair running at 3.125
Gbps. At the XAUI receiver, the incoming data is decoded and mapped back to the 32-
bit XGMII format. This provides a transparent extension of the physical reach of the
XGMII and also reduces the interface pin count.
Figure 1–62. XAUI in 10 Gbps LAN Layers
XAUI functions as a self-managed interface because code group synchronization,
channel deskew, and clock domain decoupling is handled with no upper layer
support requirements. This functionality is based on the PCS code groups that are
used during the inter-packet gap time and idle periods.
Cyclone IV Device Handbook,
Volume 2
Chapter 1: Cyclone IV Transceivers Architecture
LAN CSMA/DC Layers
Higher Layers
LLC or other MAC client
MAC Control (Optional)
MAC
Reconcilation
XGMII
XGMII Extended Sublayer
XAUI
XGMII Extended Sublayer
XGMII
PCS
PMA
PMD
Medium
10 Gbps
Transceiver Functional Modes
Optional XGMII
Extender
PHY
February 2015 Altera Corporation
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