On-Chip Series Termination With Calibration - Altera Cyclone IV Device Handbook

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6–8
Table 6–2. Cyclone IV Device I/O Features Support (Part 2 of 2)
IOH/IOL Current Strength
Setting (mA)
I/O Standard
Column I/O
BLVDS
8,12,16
(3)
LVDS
(3),
(4)
PPDS
RSDS and mini-
(3),
(4)
LVDS
Differential LVPECL
(5)
Notes to
Table
6–2:
(1) The default current strength setting in the Quartus II software is 50- OCT without calibration for all non-voltage reference and HSTL/SSTL Class I I/O standards.
The default setting is 25- OCT without calibration for HSTL/SSTL Class II I/O standards.
(2) The differential SSTL-18 and SSTL-2, differential HSTL-18, HSTL-15, and HSTL-12 I/O standards are supported only on clock input pins and PLL output clock pins.
(3) True differential (PPDS, LVDS, mini-LVDS, and RSDS I/O standards) outputs are supported in row I/O banks 1, 2, 5, and 6 only for Cyclone IV E devices and right
I/O banks 5 and 6 only for Cyclone IV GX devices. Differential outputs in column I/O banks require an external resistor network.
(4) This I/O standard is supported for outputs only.
(5) This I/O standard is supported for clock inputs only
(6) The default Quartus II slew rate setting is in bold; 2 for all I/O standards that supports slew rate option.
(7) Differential SSTL-18, differential HSTL-18, HSTL-15, and HSTL-12 I/O standards do not support Class II output.
(8) Cyclone IV GX devices only support right I/O pins.
(9) Altera not only offers current strength that meets the industrial standard specification but also other additional current strengths.
1
For more details about the differential I/O standards supported in Cyclone IV I/O
banks, refer to

On-Chip Series Termination with Calibration

Cyclone IV devices support R
banks. The R
to the external 25- ±1% or 50- ±1% resistors connected to the RUP and RDN pins, and
dynamically adjusts the I/O buffer impedance until they match (as shown in
Figure
Cyclone IV Device Handbook,
Volume 1
R
Calibration
(1)
(9)
,
Setting, Ohm ()
Column
Row I/O
I/O
8,12,16
"High-Speed I/O Interface" on page
OCT with calibration in the top, bottom, and right I/O
S
OCT calibration circuit compares the total impedance of the I/O buffer
S
6–2).
Chapter 6: I/O Features in Cyclone IV Devices
OCT with
R
OCT Without
S
S
Calibration
Setting, Ohm ()
Row
Column
Row
(8)
I/O
I/O
I/O
6–24.
OCT Support
Cyclone
Cyclone
Slew
IV E I/O
IV GX I/O
Rate
Banks
Banks
Option
Support
Support
(8)
3,4,5,6,
0,1,2
7,8
1,2,3,4,
5,6
5,6,7,8
3,4,5,6,
7,8
March 2016 Altera Corporation
PCI-
clamp
Diode
(6)
Support

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