Hot-Socketing Specifications; Devices Driven Before Power-Up; I/O Pins Remain Tri-Stated During Power-Up - Altera Cyclone IV Device Handbook

11–2
Table 11–1. Power Supply Descriptions for the Cyclone IV GX Devices (Part 2 of 2)
Power Supply Pin
VCCL_GXB
Notes to Table 11–1:
(1) You must power up VCCA even if the phase-locked loop (PLL) is not used.
(2) I/O banks 3, 8, and 9 contain configuration pins. You can only power up the V
For Fast Passive Parallel (FPP) configuration mode, you must power up the V
(3) All device packages of EP4CGX15, EP4CGX22, and device package F169 and F324 of EP4CGX30 devices have two VCC_CLKIN dedicated clock
input I/O located at Banks 3A and 8A. Device package F484 of EP4CGX30, all device packages of EP4CGX50, EP4CGX75, EP4CGX110, and
EP4CGX150 devices have four VCC_CLKIN dedicated clock input I/O bank located at banks 3A, 3B, 8A, and 8B.
(4) You must set VCC_CLKIN to 2.5V if the CLKIN is used as a high-speed serial interface (HSSI) transceiver refclk. When not used as a transceiver
refclk, VCC_CLKIN supports 1.2 V/ 1.5 V/ 1.8 V/ 2.5 V/ 3.0 V/ 3.3V voltages.
Table 11–2. Power Supply Descriptions for the Cyclone IV E Devices
VCCINT
VCCA
VCCD_PLL
VCCIO
Notes to
(1) You must power up VCCA even if the PLL is not used.
(2) I/O banks 1, 6, 7, and 8 contain configuration pins.

Hot-Socketing Specifications

Cyclone IV devices are hot-socketing compliant without the need for any external
components or special design requirements. Hot-socketing support in Cyclone IV
devices has the following advantages:
■ You can drive the device before power up without damaging the device.
■ I/O pins remain tri-stated during power up. The device does not drive out before
or during power-up. Therefore, it does not affect other buses in operation.

Devices Driven Before Power-Up

You can drive signals into regular Cyclone IV E I/O pins and transceiver
Cyclone IV GX I/O pins before or during power up or power down without
damaging the device. Cyclone IV devices support any power-up or power-down
sequence to simplify system-level designs.

I/O Pins Remain Tri-stated During Power-Up

The output buffers of Cyclone IV devices are turned off during system power up or
power down. Cyclone IV devices do not drive out until the device is configured and
working in recommended operating conditions. The I/O pins are tri-stated until the
device enters user mode.
Cyclone IV Device Handbook,
Volume 1
Nominal Voltage Level (V)
1.2
Power Supply Pin
(1)
(2)
Table 11–2:
Chapter 11: Power Requirements for Cyclone IV Devices
Transceiver PMA and auxiliary power supply
level of I/O banks 3 and 9 to 1.5 V, 1.8 V, 2.5 V, 3.0 V, or 3.3 V.
CCIO
level of I/O bank 8 to 1.5 V, 1.8 V, 2.5 V, 3.0 V, or 3.3 V.
CCIO
Nominal Voltage Level (V)
1.0, 1.2
2.5
1.0, 1.2
1.2, 1.5, 1.8, 2.5, 3.0, 3.3
Hot-Socketing Specifications
Description
Description
Core voltage power supply
PLL analog power supply
PLL digital power supply
I/O banks power supply
May 2013 Altera Corporation