Altera Cyclone IV Device Handbook page 118

6–12
Table 6–3. Cyclone IV Devices Supported I/O Standards and Constraints (Part 2 of 3)
I/O Standard
2.5-V LVTTL /
Single-ended
LVCMOS
1.8-V LVTTL /
Single-ended
LVCMOS
1.5-V LVCMOS Single-ended
(4)
1.2-V LVCMOS Single-ended
SSTL-2 Class I, voltage-
SSTL-2 Class II referenced
SSTL-18 Class I, voltage-
SSTL-18 Class II referenced
HSTL-18 Class I, voltage-
HSTL-18 Class II referenced
HSTL-15 Class I, voltage-
HSTL-15 Class II referenced
voltage-
HSTL-12 Class I
referenced
voltage-
(9)
HSTL-12 Class II
referenced
PCI and PCI-X Single-ended
Differential SSTL-2 Differential
(5)
Class I or Class II
Differential SSTL-18 Differential
(5)
Class I or Class II
Differential HSTL-18 Differential
(5)
Class I or Class II
Differential HSTL-15 Differential
(5)
Class I or Class II
Differential HSTL-12 Differential
(5)
Class I or Class II
(6)
PPDS Differential
(10)
LVDS Differential
RSDS and
Differential
(6)
mini-LVDS
(8)
BLVDS Differential
Cyclone IV Device Handbook,
Volume 1
V
Standard
Type
Support
3.3/3.0/2.5
JESD8-5
JESD8-7 1.8/1.5
JESD8-11 1.8/1.5
JESD8-12A
JESD8-9A
JESD815
JESD8-6
JESD8-6
JESD8-16A
JESD8-16A
—
JESD8-9A
JESD815
JESD8-6
JESD8-6
JESD8-16A
—
ANSI/TIA/
EIA-644
—
—
Chapter 6: I/O Features in Cyclone IV Devices
Level (in V) Column I/O Pins
CCIO
CLK,
Input Output
DQS
v
2.5
(3)
v
(3)
1.8
v
(3)
1.5
v
1.2 1.2
v
2.5 2.5
v
1.8 1.8
v
1.8 1.8
v
1.5 1.5
v
1.2 1.2
v
1.2 1.2
v
3.0 3.0
— 2.5 —
v
2.5 —
— 1.8 —
v
1.8 —
— 1.8 —
v
1.8 —
— 1.5 —
v
1.5 —
— 1.2 —
v
1.2 —
— 2.5 —
v
2.5 2.5
— 2.5 —
2.5 2.5 —
I/O Standards
Row I/O Pins
User
CLK,
PLL_OUT I/O
DQS
Pins
v v v
v v v
v v v
v v v
v v v
v v v
v v v
v v v
v v v
v v
—
v v v
v
— —
v
— —
v
— —
v
— —
v
— —
v
— —
v
— —
v
— —
v
— —
v
— —
v v
—
v v v
v v
—
v
— —
March 2016 Altera Corporation
(1)
User I/O
Pins
v
v
v
v
v
v
v
v
v
—
v
—
—
—
—
—
—
—
—
—
—
v
v
v
v