Configuration And Jtag Pin I/O Requirements - Altera Cyclone IV Device Handbook

Chapter 8: Configuration and Remote System Upgrades in Cyclone IV Devices
Configuration
Table 8–2. Uncompressed Raw Binary File (.rbf) Sizes for Cyclone IV Devices (Part 2 of 2)
Note to
(1) Only for the F484 package.
Use the data in
configuration file formats, such as Hexadecimal (.hex) or Tabular Text File (.ttf)
formats, have different file sizes. However, for any specific version of the Quartus II
software, any design targeted for the same device has the same uncompressed
configuration file size. If you use compression, the file size varies after each
compilation, because the compression ratio depends on the design.
f
For more information about setting device configuration options or creating
configuration files, refer to the
Configuration Handbook.

Configuration and JTAG Pin I/O Requirements

Cyclone IV devices are manufactured using the TSMC 60-nm low-k dielectric process.
Although Cyclone IV devices use TSMC 2.5-V transistor technology in the I/O
buffers, the devices are compatible and able to interface with 2.5, 3.0, and 3.3-V
configuration voltage standards by following specific requirements.
All I/O inputs must maintain a maximum AC voltage of 4.1 V. When using a serial
configuration device in an AS configuration scheme, you must connect a 25- series
resistor for the DATA[0] pin. When cascading the Cyclone IV device family in a
multi-device configuration for AS, AP, FPP, and PS configuration schemes, you must
connect the repeater buffers between the master and slave devices for the DATA and
DCLK pins. When using the JTAG configuration scheme in a multi-device
configuration, connect 25- resistors on both ends of the TDO-TDI path if the TDO
output driver is a non-Cyclone IV device.
The output resistance of the repeater buffers and the TDO path for all cases must fit the
maximum overshoot equation shown in
Equation 8–1.
Note to
(1) Z
May 2013 Altera Corporation
Device
Cyclone IV GX
Table 8–2:
Table 8–2 to estimate the file size before design compilation. Different
(1)
Equation 8–1:
is the transmission line impedance and R
O
EP4CGX15
EP4CGX22
EP4CGX30
EP4CGX50
EP4CGX75
EP4CGX110
EP4CGX150
Software Settings section in volume 2 of the
Equation 8–1.
 
0.8Z O R E 1.8Z O
is the equivalent resistance of the output buffer.
E
8–5
Data Size (bits)
3,805,568
7,600,040
7,600,040
(1)
22,010,888
22,010,888
22,010,888
39,425,016
39,425,016
Cyclone IV Device Handbook,
Volume 1